Samsung manages to reduce the power consumption of its 3nm chips by up to 50%

When it comes to the technology industry, we almost forget Samsung, since this sector is dominated mainly by the Taiwanese TSMC. However, the South Korean company remains focused on its mission to bring the best and most advanced chips to market.

According to the latest information, Samsung has managed to reduce the power consumption of its 3nm chips by up to 50%. Besides, he also got an improvement in performance and efficiency in the area.

Less power consumption with Samsung’s 3nm chips

We know that Samsung isn’t the leading manufacturer right now when it comes to new and more advanced manufacturing processes. But the South Korean company is struggling to keep up with the trend and is also working during the new 3nm lithography. As such, the brand has just unveiled good news concerning this same lithograph of the future generation.

According to the information, Samsung has already announced that its 3nm manufacturing process is already mass-produced. Moreover, it was revealed that its chips with this lithography could achieve up to 50% reduction in power consumption.

The information was revealed after the South Korean company’s meeting to disclose the results for the first quarter of 2022. Samsung management informed the board that the performance of 3nm chips was improving, and employees denied recent rumors that the performance and yield of these components were low, rumors that scared off customers like Nvidia and Qualcomm.

Samsung says 3nm chips are its big bet to try and catch up with TSMC, as the Taiwanese won’t be using next-gen GAA transistor technology. The South Korean brand will thus adopt this technology, the manufacture of which involves the use of nanosheet devices that can thus improve the performance of transistors and replace a large part of FinFET technology.

Thus, the brand claims that compared to the 7nm manufacturing process, then the 3nm GAA technology will reduce power consumption by 50%, improve performance by 35% and also improve area efficiency by more than 45%. %. %.

Additionally, the company noted that its 5nm process has now entered a more mature stage, and although the process for improving the performance of 4nm chips has been downgraded, it has entered an expected performance curve.

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